operating duty:

1. Responsible for testing SOC DFT / APTG at CP / ft stage;

2. Provide test solutions in the R & D and mass production stages, including the development of ATE test plans and ate chip test procedures;

3. Be responsible for bringing up SOC mass production process test, and analyze and solve problems with designer

4. Assist in improving the yield and optimize the test time. Be responsible for the characteristic analysis and data processing of the chip;

5. Be responsible for docking and communication with the sealing and testing factory.

Job requirements:

1. Bachelor degree or above in microelectronics, electronic engineering and other related disciplines, with one year or more experience in chip testing and development;

2. Proficient in the development of more than one ate test machine test program, with experience in mass production product development, and experience in mass production test and development of wireless communication products is preferred;

3. Familiar with ATE test process and basic test methods;

4. Master the knowledge of various test hardware (socket, probe card, loadboard) and the equipment knowledge of ATE test machine;

5. Familiar with oscilloscope, signal source and other laboratory test instruments;

6. Good communication and coordination skills, good team spirit and cooperation spirit.